Not many Done yet only some ES, hard to now the avarge temp drop when only a couple of CPUs ar delidded.

 

But Its seems more easy to do with the razior, only pcb and die no components like on Haswell.

Screw it, I decided to stick with my 2500k overclocked to 4.6 ghz for now. Upgraded the ram so I have good timing. 

 

I'm building a home cockpit so I instead of dropping down on a 6700k, built a cheapo G328 (amazing price for a i5 duo core!) overclocked it to 4.2 ghz to offload the panels (check out signature, running Jeehell FMGS avionics suite).

 

P3D and active skynext will continue to run on the 2500k. Planning to also upgrade to Windows 10. 

Here is a video on Asus new installation tool for 1151 CPUs , easy to use and no more bent pins

Some more dellid , results

http://www.techpowerup.com/215085/intel-skylake-de-lidded-reveals-tiny-die.html?cp=2#comments

Yep, I spotted that one. Sure enough 20 degrees.

 

Looking at that Asus installation tool... I wonder if it would help in regard to delidding. Help by preventing the IHS from sliding during installation. Drop the CPU in the socket, mount the IHS in the tool, and drop it in place.

Yep, I spotted that one. Sure enough 20 degrees.

 

Looking at that Asus installation tool... I wonder if it would help in regard to delidding. Help by preventing the IHS from sliding during installation. Drop the CPU in the socket, mount the IHS in the tool, and drop it in place.

Yes , it used by the pros

Drop the IHS in the tool then mount the CPU on The tool and IHS you get a package, then drop in the socket like you do with non delidded CPU

Hasse, do you have any Skylake FSXMark numbers to share?  I'm curious to see how it does against my 5GHz 4790k w/2400MHz C10 1T RAM.  

Interesting thread and looking forward to more actual tests to come in for P3D using a good GPU such as the 980 Ti.

Just finished a delid last night on my 3770k with great results. No damage (or injuries) with the razor method... I say this only because it's hard to believe that a couple of generations after IB, a delid apparently still yields good results. Can Intel stop cheaping out on the TIM under the IHS??

Hasse, do you have any Skylake FSXMark numbers to share?  I'm curious to see how it does against my 5GHz 4790k w/2400MHz C10 1T RAM.

 

I put some result's here http://www.avsim.com/topic/329116-fsxmark11/page-49 at 4.5Ghz. Currently at 4.6 on air. Temperatures at 65C. Seems to be limited by how many volts you are willing to risk. Use Realbench for testing as load better matches FSX/P3D. Prime causes excessive volts in offset mode. HT off.

Just finished a delid last night on my 3770k with great results. No damage (or injuries) with the razor method... I say this only because it's hard to believe that a couple of generations after IB, a delid apparently still yields good results. Can Intel stop cheaping out on the TIM under the IHS??

Might not be just cheaping out Greg.

 

I read the other day, how that with the reduction to a 14nm manufacturing process, conventional soldering would be likely to cause damage. Hence the switch to paste. Not sure if this is true or not. Cracking or shorting out the die is claimed.

I put some result's here http://www.avsim.com/topic/329116-fsxmark11/page-49 at 4.5Ghz. Currently at 4.6 on air. Temperatures at 65C. Seems to be limited by how many volts you are willing to risk. Use Realbench for testing as load better matches FSX/P3D. Prime causes excessive volts in offset mode. HT off.

 

I saw your results and should thank you for posting them!  I am looking for Hasse's (westman) feedback specifically as he is an even more experienced overclocker than I, and I'm the guy who wrote the Ivy Bridge delid instruction guide  :wink:

 

I'm specifically looking for the upper-bound of the overclocking potential of these early production chips to see if it is worth buying now or if it is better to wait.  If he only got 4.7GHz then it may not be worth it for me since I'm already at 5GHz on Haswell.  

Might not be just cheaping out Greg.

 

I read the other day, how that with the reduction to a 14nm manufacturing process, conventional soldering would be likely to cause damage. Hence the switch to paste. Not sure if this is true or not. Cracking or shorting out the die is claimed.

 

Hmm, I've not heard that and I am skeptical.  Silicon is silicon, and the top layer of the die is not a functional layer (i.e. contains no circuits), it exists only to protect the actual inner workings of the chip.   

Hmm, I've not heard that and I am skeptical. Silicon is silicon, and the top layer of the die is not a functional layer (i.e. contains no circuits), it exists only to protect the actual inner workings of the chip.

 

This wasn't the actual article, but here's something about it. seems it was claimed that the solder itself would crack prematurely. Elsewhere I've seen claims of damage to the die due to the heat of soldering.

 

Intel first moved to away from solder starting with Ivy Bridge. One of the issues cited was that the smaller die size from the 22nm, now 14nm process, would cause the solder to crack prematurely.

 

http://www.eteknix.com/intel-skylake-i7-6700k-de-lid-shows-thermal-paste-small-die-no-vrm/

This wasn't the actual article, but here's something about it. seems it was claimed that the solder itself would crack prematurely. Elsewhere I've seen claims of damage to the die due to the heat of soldering.

 

 

 

http://www.eteknix.com/intel-skylake-i7-6700k-de-lid-shows-thermal-paste-small-die-no-vrm/

 

I can't really accept this theory.  A user from the Anandtech forums (one of the largest tech forums on the internet) reports his experience and observations with the quad core Haswell (22nm) Xeons almost certainly having soldered IHS, here:

 

http://forums.anandtech.com/showpost.php?p=36713207&postcount=5

 

If the argument is that die sizes have become too small for soldered IHS since the transition to 22nm (that includes Ivy Bridge and Haswell), then these Xeons should not have soldered IHS but they appear to.  

 

In all likelihood, the reason for using TIM rather than solder is purely for cost-saving purposes on consumer products.  The higher price of Xeons justifies their use of solder.  

I can't argue with your logic.

 

There are all kinds of theories floating around, but I guess  only Intel know for sure.

 

"cost saving" would seem to be the most likely explanation.

 

I guess indium is an exotic and expensive material compared to NGPTIM.